to the point where they are also capable of bypassing the top of rack (TOR) switch and connecting directly to the end of row (EOR) switch. But, that is not the only way.
AppliedMicro’s X-Weave architecture enables datacenter system architects to build dense, shared memory space servers at a rack level using simple network topologies from the TOR switches. X-Weave could help lower Total Cost of Ownership (TCO) by simplifying network management at scale, eliminating mid-rack switches, significantly reducing cable count and by enabling higher server node densities.
Table of Contents
- Executive Summary
- Background: Remote DMA and Coherent Memory
- Memory Coherence Over Networks
- Hyperscale Architecture is Different, and So is HPC
- AppliedMicro X-Weave Architecture and Gearbox 2
- AppliedMicro X-Gene 2 System Design with Gearbox 2
- Practical Applications of X-Weave Architecture and X-Gene 2 SoC
- Call to Action
- Figure 1: AppliedMicro Hyperscale Tray Reference Design: 10 Server Nodes Sharing Four 25Gbps Links
- Figure 2: AppliedMicro Hyperscale Server Node Reference Design
- Figure 3: AppliedMicro Hyperscale Rack Reference Concept: 240 Server Nodes Using 24 x 25Gbps TOR Links
Companies Cited
- AMD
- ARM
- HP
- Intel
- Red Hat
Patrick founded the firm based on his real-world world technology experiences with the understanding of what he wasn’t getting from analysts and consultants. Ten years later, Patrick is ranked #1 among technology industry analysts in terms of “power” (ARInsights) in “press citations” (Apollo Research). Moorhead is a contributor at Forbes and frequently appears on CNBC. He is a broad-based analyst covering a wide variety of topics including the cloud, enterprise SaaS, collaboration, client computing, and semiconductors. He has 30 years of experience including 15 years of executive experience at high tech companies (NCR, AT&T, Compaq, now HP, and AMD) leading strategy, product management, product marketing, and corporate marketing, including three industry board appointments.
